![]() ![]() Department of Electrical &
Electronic Engineering Electrical & Electronic Eng.
(EEE) BEng & MEng 2nd Year
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Aims & Objectives
This experiment is designed to support my second year course E2.1 Digital Electronics II (COURSE WEBPAGE HERE).The VERI Experiment Handbook (all four parts) can be found HERE.
Experiment |
Useful Resources |
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DE1-SoC Reference Manuals
DE1-SoC Board from Terasic
DE1-SoC Learning Roadmap
DE1-SoC Getting Started Guide
DE1-SoC My First FPGA
DE1-SoC User's Manual
DE1-SoC Schematic Diagram
Cyclone V Device Handbooks
Cyclone V Device Overview
Cyclone V Device Handbook Vol 1: Device Interfaces and Integration
Cyclone V Device Handbook Vol 2: Transceivers
Cyclone V Device Handbook Vol 3: Hard Processor System Technical Reference Manual
Quartus Related Links
Quartus Prime Lite Web Edition (free)
Quartus Tutorial Page (containing MANY tutorials, probably too many. Be selective!)
Verilog Resources
Verilog tutorial by ASIC World