Department of Electrical & Electronic Eng.  (EEE)   BEng & MEng 2nd Year   | 
Aims & Objectives
This module builds on the first-year modules relating to analogue and digital circuits, computer architecture, and programming, to teach students how to analyse and design electronic circuits with a system level perspective. The aim of this module is to provide students with the theoretical foundations, the design techniques and hands-on experiences of acquiring physical analogue signals, pre-processing them, converting into digital form, then process these in a digital programmable hardware on a Field Programmable Gate Array (FPGA). Unlike last year's module on circuits, year students will learn to process signals that have noise and electronic hardware that are non-ideal.
By the end of the course, you should be able to:This course is supported by 6 Laboratory Experiments based a Lab-in-a-Box to enable students to conduct all the experiments in-person and at home.
RECOMMENDED TEXTBOOKS
COURSE SCHEDULE AND CONTENTS
Date  | 
    Topics  | 
    Resources  | 
  
7  Oct  | 
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13 Oct  | 
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14  Oct  | 
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20  Oct  | 
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21  Oct  | 
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27  Oct  | 
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28  Oct  | 
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3-4 Nov  | 
    
LECTURE NOTES
Lecture 1 - Introduction to circuits & systems (notes) Lecture 2 - Amplification and Single-Rail Op-amp (notes) Lecture 3 - Understanding Op-amp Specification (notes) Lecture 4 - Understanding Op-amp Models (notes) Lecture 5 - Op-amp Applications (notes) Lecture 6 - Active Filters (notes) Lecture 7 - Digital Design with FPGAs (notes) Lecture 8 - SystemVerilog HDL (notes) 
LAB INSTRUCTIONS
Lab 1- Amplification & Single-rail Op-Amp Lab 2 - Op-amp Applications Lab 3 - Introduction to Quartus & DE10-Lite 
PROBLEM SHEETS
Problem Sheet 1 (solutions) Problem Sheet 2 (solutions) Problem Sheet 3 (solutions)