THICK_ACTIVE is a layer used for those processes offering two different
thicknesses of gate oxide (typically for the layout of transistors that
operate at two different voltage levels). The ACTIVE layer is used to
delineate all the active areas, regardless of gate oxide thickness.
THICK_ACTIVE is used to to mark those ACTIVE areas that will have the
thicker gate oxide; ACTIVE areas outside THICK_ACTIVE will have the
thinner gate oxide.
| Rule |
Description |
Lambda
(SUBM and DEEP) |
| 24.1 |
Minimum width |
4 |
| 24.2 |
Minimum spacing |
4 |
| 24.3 |
Minimum ACTIVE overlap |
4 |
| 24.4 |
Minimum space to external ACTIVE |
4 |
| 24.5 |
Minimum poly width in a THICK_ACTIVE gate |
3 |
| 24.6 |
Every ACTIVE region is either entirely inside
THICK_ACTIVE or entirely outside THICK_ACTIVE |
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