Imperial CollegeOF SCIENCE, TECHNOLOGY AND MEDICINE University of London Reconfigurable Computing Research Department of Electrical & Electronic Engineering Department of Computing

Peter Y. K. Cheung Principal Supervisor	Wayne Luk  Co-supervisor	Simon Haynes  PhD student, Year 3	Joern Gause PhD student, Year 1

SONIC is designed to support the software plug-in methodology to accelerate video image processing applications.  SONIC differs from other architectures through the use of novel Plug-In Processing Elements (PIPEs).  Each PIPE contains a reconfigurable processor, a scalable router that can also format video data, and a frame-buffer memory.

The SONIC architecture integrates multiple PIPEs and their routers together via a specialised bus structure that facilitates the plug-in methodology for video processing.  Our implementation of SONIC, the SONIC-1, uses the PCI bus and has 8 PIPEs.  We estimate that for 512 x 512 video over PCI bus, SONIC-1 can achieve operating rates of more than 20 frames per second.

Top and bottom view of a PIPE

Publication 

S.D. Haynes, P.Y.K. Cheung, W. Luk, J. Stone, "SONIC: A Plug-in Architecture for Video Processing", submitted to FPL'99.

S.D. Haynes, P.Y.K. Cheung, W. Luk, J. Stone, "SONIC: A Plug-in Architecture for Video Processing", poster presentation at FCCM'99.

Sonic Home Page

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This page maintained by Peter Cheung
Last updated:21 Jan, 1999